Western Digital SweRV Core EH1-ip-18596

¥10,000.00
有货
SKU
ip-18596
Brand :
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供应商 Codasip
型号 High performance, dual issue, superscalar, embedded 32-bit RISC-V core with 9-stage pipeline
类型 Soft IP
到期日 In Production
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特征 Supports RV32IMC instruction set dual issue 9-stage pipeline instruction cache 4.9 CoreMark/MHz RISC-V privilege mode support: Machine SweRV Core Support Package providing a low risk way of deploying a SweRV core with either open source (Free version) or commercial EDA tools (Pro version). Software toolchain with SweRV Core Support Package Pre-defined EDA flows with differences between specific EDA tools abstracted from the user.
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The Western Digital SweRV Core? EH1 is a 2-way superscalar core with a 9-stage pipeline. The core includes two identical ALUs, a divider and a pipelined multiplier. Like the EH2 and EL2, it supports optional instruction and data closely coupled memories with ECC protection and optional 2- or 4-way set-associative instruction cache with parity or ECC protection (32- or 64-byte line size). The EH1’s performance is rated at 4.9 CoreMark/MHz. The core has been open sourced through CHIPS Alliance.
The SweRV Core Support package for EH1 contains everything needed to deploy a Western Digital SweRV EH1 core in an integrated circuit providing support for both EDA tool flows and embedded software development. The package saves the considerable effort that would be needed to set up EDA flows for the EH1 core from scratch. The SweRV Core Support Package for EH1 is available in both Free and Pro versions.
The Free version consists of open source deliverables and infrastructure for using open source EDA tools and an SDK. Users can access a forum for support
The Pro version combine open source and commercial deliverables. It provides flows, examples and models for using commercial EDA tools. Codasip provides professional support for this version.

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