Power Optimized

Power optimized Standard Cell Libraries are a collection of ASIC building blocks designed for low power or cost critical applications. The standard cell library typically contains both logical and physical representations for use with standard place and route tools.

SEC14LPP STD Cells 4MBFF-ip-22971
￥10,000.00
SEC LN05LVH 6T STD cells MBLAT-ip-18743
￥10,000.00
SMIC13LL 6T STD cells MBFF-ip-18742
￥10,000.00
SEC10LPP STD Cells 4MBFF-ip-18741
￥10,000.00
Standard Cell 7-track in TSMC(28HPC+,40ULP,55nm,90BCD+)-ip-18740
￥10,000.00
Standard Cell 6.5-track in TSMC(22ULP,22ULL,28HPC+)-ip-14556
￥10,000.00