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| 供应商 | Arasan Chip Systems |
|---|---|
| 型号 | USB 2.0 Device Controller - Compliant to v2.0 with optional AHB, PCI or custom I/F |
| 类型 | Soft IP |
| 到期日 | In Production |
| 源网址 | View more |
| 特征 | USB Specification Rev 2.0 Supports 16-bit UTMI and 8-bit ULPI interfaces Direct addressing of all registers from PCI, Custom, or AHB bus Software control of device remote wake-up DMA controller support |
| 详情页 | View more |
| 附件链接 | View more |
The USB 2.0 Device IP Core is an USB 2.0 compliant device core with optional PCI, Custom, or AHB master/slave interfaces. The USB 2.0 device core supports 480 Mbit/s in High Speed (HS) mode. 12 Mbit/s in Full Speed (FS) mode, and 1.5 Mbit/s in Low Speed (LS) mode. The Arasan USB 2.0 Device IP Core supports up to 30 configurable IN/OUT non-control endpoints. Each noncontrol endpoint has anendpoint controller that supports interrupt, bulk, and isochronous transfers. There is one control endpoint that handles the setup, data, and status stages during control transfers. Auto Validation, Manual Validation, or Fly mode can be selected to reduce loading of the hostCPU during in-transfer operations. The Arasan USB 2.0 Device IP Core includes a DMA controller for handling high-speed data transfers between the USB 2.0 device core and PCI/Custom/AHB interface. With the addition of an ULPI Wrapper, the Arasan USB 2.0 Device IP Core can be connected directly to a standard UTMI or 8-bit ULPI transceiver. The Arasan USB 2.0 Device IP Core is an RTL design in Verilog that implements an USB device controller on an ASIC or FPGA. The core includes RTL code, test scripts and a test environment for full simulation verifications. Licensees include Micro Linear, Focus Semiconductors, Beceem Communications and others.
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