T13V33_LVDSTX_02-ip-17751

¥10,000.00
有货
SKU
ip-17751
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供应商 VeriSilicon
型号 TSMC 0.13um LVDS Transmitter
类型 Hard IP
到期日 Pre-silicon
源网址 View more
特征 Supports 20MHz ~ 92MHz clock 35:5 data channel compression ratio at up to 650Mbps per channel data rate Supports single pixel and dual pixel interfaces Converts 70 bits data to 10-pair LVDS data stream No special start-up sequence required between clock/data and PD pins Supports Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% center spread or -5% down spread No external component required for PLL Clock edge selectable Compatible with the TIA/EIA-644-A LVDS standard
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The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link transmission between Host and Flat Panel Display with up to UXGA resolution. The IP converts 70-bit of CMOS/TTL data into LVDS data stream. The transmitter can be programmed for rising edge or falling edge clocks via a dedicated pin.

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