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| 供应商 | VeriSilicon |
|---|---|
| 型号 | SMIC 0.16um Hi-Speed USB UTMI-Based Peripheral Transceiver IP |
| 类型 | Hard IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Compliant with USB Spec Rev2.0 Compliant with UTMI Spec Rev1.05 Support 480Mbit/s "High Speed" and 12Mbit/s "Full Speed". Support 60MHz/8-bit unidirectional interface and 30MHz/16-bit bidirectional interface. 12MHz external crystal, internal oscillator and PLL are used to generate high-speed internal clock and CLKOUT output. Internal terminations include 1.5Kohm pull-up resistor switching on DP/DM in the FS state and the HS chirp state. Clock and data recovery from serial stream on the USB bus. Support detection of USB reset, suspend, resume and remote-wake-up features. Support test modes defined in USB2.0 Specification. |
| 详情页 | View more |
| 附件链接 | View more |
The USB 2.0 PHY is a Hi-Speed Universal Serial Bus (USB) peripheral transceiver IP based on the Intel® USB 2.0 Transceiver Macrocell Interface (UTMI) standard. It provides the complete solution of physical layer (PHY) functionality for a Hi-Speed or full-speed USB chip. Designed to seamlessly integrate with Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs), the USB 2.0 PHY simplifies the design process and speed time-to-market. Because UTMI is a proven, standardized implementation of the transceiver, the products integrated with USB 2.0 PHY are easier to test and offer wider interoperability. The USB 2.0 PHY has a parallel, bidirectional data interface with 8/16 bits width that complies with the UTMI standard. It supports data transfer at high-speed (480 Mbps) and full-speed (12 Mbps) rates, so it can operate in USB devices of either type.
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