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| 供应商 | Rambus |
|---|---|
| 型号 | Rambus Poly1305 Crypto Accelerator |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Pipelined high speed Wide bus interface R Key and S Key inputs – 128-bit wide Digest input – 131-bit wide DMA and AEAD support Fully synchronous design High speed and low gate-count configurations Data output – 131-bit wide |
| 详情页 | View more |
| 附件链接 | View more |
The EIP-53 Poly engine is an efficient hardware implementation of the Poly1305 algorithm, as specified by the Internet Research Task Force (IRTF), RFC7539 standard, and for use in TLS1.3(Draft). The accelerator includes I/O registers and a Poly1305 HASH core. Designed for fast integration, low gate count, and maximum performance, the Poly1305 Engine provides a reliable and cost-effective IP solution that is easy to integrate into SoC designs.
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