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| 供应商 | Noesis Technologies |
|---|---|
| 型号 | Single Channel HDLC Controller |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Single port synchronous serial line interface with 8-bit parallel back-end interface Flag/Abort Generation/Detection Zero Insertion/Deletion Non-octet alignment and Runt frame detection CCITT CRC-16 Generation and Checking NRZ/NRZI encoding/decoding Transparent mode and flag in interframe-time fill support Receive FIFO overrun and Transmit FIFO underrun detection Frame status and frame length indicators Seperate clocks for Tx and RX interfaces |
| 详情页 | View more |
| 附件名称 | ntHDLC_pb.pdf |
| 附件链接 | View more |
Noesis Technologies ntHDLC single channel High-Level Data Link Controller (HDLC) is a full-duplex transceiver with independent transmit and receive units for synchronous framing bit-level HDLC protocol operations. The ntHDLC can handle interframe and delimiting flags, frame check sequence based on CCITT CRC16/CRC32 polynomial, normal or transparent transmission modes, abort generation and detection. The system interface is very flexible and can be adapted towards FIFO, uP, or DMA controllers. The transmit and receive units and their associated control and status logic are independent. This partitioning strategy enables the Tx and Rx units to be instantiated in different place and/or level of the design hierarchy. Each unit (Tx, Rx and back-end interface) has its own clock domain with synchronous clock enable. Communication between the various clock domains is achieved via synchronization logic blocks.
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