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MIPI CPHY/DPHY combo Transimitter with 3_Trio TSMC 16FFC-ip-22122
￥10,000.00
| 供应商 | M31 Technology Corporation |
|---|---|
| 型号 | MIPI CPHY/DPHY combo Transimitter with 3_Trio |
| 类型 | Hard IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Compliant with MIPI D-PHY v1.2 and C-PHY v1.1 spec Support HS data rate from 80Mbps (0.8Gsps) up to 2.5Gbps ( 2.5Gsps ) per lane ( per trio ) Support LS data rate of 10Mbps and Ultra-low power mode Support D-PHY mode with 1 clock lane & up to 4 data lanes Support C-PHY mode up to 3 trios for TX and 4 trios for RX Support TX-EQ function to compensate loss of long channel Support extra RX mode with 2 sets of 1 clock lane & up to 2 data lanes Provide D-PHY swap function for clock and data lanes; Provide C-PHY swap function for trios Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production test Available in 12/16nm, 28nm and 40nm process |
| 详情页 | View more |
| 附件链接 | View more |
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve throughput over bandwidth limited channel, the C-PHY is developed and is delivering 2.28 bits per symbol over three-wire trio. As a MIPI Alliance contributor and leading Interface IP provider, M31 provides a silicon-proven, low-power and low cost C-PHY/D-PHY combo IP in different process nodes. User can configure the PHY into D-PHY mode or C-PHY mode to support different applications using the same PHY. It is compliant to the PPI interface which allows seamless integration with upside controllers for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols.
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