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| 供应商 | GUC |
|---|---|
| 型号 | DMA Controller |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Logic Embedded NVM IP Programming with channel hot electron injection, erasing with UV illumination High yield performance Small IP size Good retention realibility Testable at wafer level |
| 详情页 | View more |
| 附件链接 | View more |
IGDAHB003A, the DMA Controller, is a synthesizable soft IP core connected to the AMBA AHB bus for easy integration into SOC implementations. It provides 2 (8/4/2 configurable) DMA channels and 4 (32/16/8/4 configurable) DMA requests. Each DMA channel has a 4-word (16/8/4/2 configurable) FIFO. It has an AHB bus slave interface for programming the registers and an AHB bus master interface for transferring data. It also supports the AHB burst transfers for a better performance. It allows peripheral-to-memory, memory-to-peripheral, peripheral-to-peripheral, and memory-to-memory transactions. Each DMA transfer is unidirectional sequential from a source to a destination. The flow controller could be the DMA Controller, source peripheral, or destination peripheral.
FAQ - Frequently Asked Questions
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A4: Members who ship their orders within Inida should expect to receive their orders within 2 working days upon payment verification depending on the count of orders received.
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