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| 供应商 | GUC |
|---|---|
| 型号 | IGALVDT01A, SubLVDS IO RX |
| 类型 | Hard IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 详情页 | View more |
| 附件链接 | View more |
The IGALVDT01A IO receiver converts the 20-lane SubLVDS (Sub-Low Voltage Differential Signaling) or SLVS (Scalable Low-Voltage Signaling) data streams to the 20-lane 0.9V CMOS data output; individually. The 20 data channels consist of 16 data lanes in the main sensor and 4 data lanes in the sub sensor. Each sensor consists of the individual clock input. The SubLVDS/SLVS data channel receives the data rate up to 1.1Gpbs with the clock rate up to 550MHz. A 100? on-chip termination is built on each receiver input and the power down control signal is used for the power saving. An individual signal detection circuit is built in each SubLVDS/SLVS IO receiver to guarantee a stable receiver output and avoid the noise disturbance. The SubLVDS/SLVS receiver is designed for the low-power application using TSMC 28nm HPM 0.9V/1.8V process.
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