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| 供应商 | VeriSilicon |
|---|---|
| 型号 | IBM 32nm USB 2.0 PHY |
| 类型 | Hard IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Process: IBM 32nm SOI process Supply voltage: 0.9v+/-10%, 1.8v +/-10%, 3v~3.3v Operating junction temperature: - 40?'￠????"?°C ~ +25?'￠????"?°C ~ +125?'￠????"?°C Compliant with the USB Spec Rev2.0 Compliant with the UTMI Spec Rev1.05 Compliant with the UTMI+ Level 3 (None OTG features and None HUB features) Supports 480Mbit/s "High Speed" and 12Mbit/s "Full Speed" Supports 60MHz/8-bit interface and 30MHz/16-bit interface 12MHz/24MHz external crystal, internal oscillator and PLL are used for generating |
| 详情页 | View more |
| 附件链接 | View more |
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog front-end with a build-in 8-bit/16-bit parallel interface, therefore, it is easy to interface with USB2.0 Device System. It can work either as a host PHY or as a device PHY, depending on the different setting from controller.
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