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| 供应商 | OPENEDGES Technology |
|---|---|
| 型号 | High Performance HBM, HBM3 |
| 类型 | Soft IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Compliant to JEDEC standard for HBM3 DRAM SID of up to 4 Channel moxde : x32 for each Pseudo Channel Support Command/Address Parity, Data Parity Support for dynamic DRAM freqency scaling Address region based security control support Automated low power control of DRAM devices DFI 5.0 Interface Compliant Priority per reqeust based on AXI QoS signal Ultra-low power consumption with HW-controlled dynamic DRAM frequency scaling |
| 详情页 | View more |
| 附件链接 | View more |
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solution or independent IP. They are tightly combined to bring synergy for high performance and low latency. OPENEDGES' integrated IP solutions are market and silicon-proven, featuring advanced architectures and proprietary technologies that enable customers to shorten their design and verification processes.
OMC – HBM3 Memory Controller is a small & highly configurable IP. It provides very high performance through advanced memory controller design based on proprietary out-of-order scheduling algorithm and high speed implementation technique. Demand for more DRAM bandwidth is getting stronger than ever in a quest to improving user experiences (e.g. higher image resolution). Given the limited amount of physically available DRAM bandwidth, highly efficient memory controller IP is becoming a very critical issue everywhere. With our OMC – HBM3 Memory Controller, SoCs can save significant amount of area & power consumption and meet next generation SoC’s DRAM bandwidth requirements.
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