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| 供应商 | Synopsys |
|---|---|
| 型号 | USB 3.0 femtoPHY in UMC (28nm) |
| 类型 | Hard IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes Supports SuperSpeed 5 Gbps data rate and is backward compatible with all USB 2.0 data rates including 480 Mbps (High-Speed), 12 Mbps (Full-Speed) and 1.5 Mbps (Low-Speed) Integrates high-speed, mixed-signal custom CMOS circuitry designed to PIPE3 and UTMI+ Level 3 specifications Can be used in USB Host, Device and Dual Role Port applications DesignWare USB-C 3.0 femtoPHY IP supports the USB Type-C connector standard Designed for easy integration with DesignWare USB 3.0 Controllers |
| 详情页 | View more |
| 附件名称 | dwc_usb3_femtophy.pdf |
| 附件链接 | View more |
The Synopsys DesignWare? USB 3.0 femtoPHY and DesignWare? USB-C 3.0 femtoPHY provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications such as digital cameras, networking and storage as well as next–generation feature-rich smartphones, tablets, digital TVs and media players requiring high throughput USB capability. Offering reduced silicon cost and longer battery life, the DesignWare USB-C/USB 3.0 femtoPHYs deliver 50% smaller die area and minimizes active and suspend power consumption.
The DesignWare USB-C/USB 3.0 femtoPHYs implement the latest USB Battery Charging and USB On-The-Go (OTG) specifications from the USB Implementer’s Forum (USB-IF).
Architected for the industry’s most advanced 1.8V process technologies, the USB-C/USB 3.0 femtoPHYs are designed to minimize effects due to variations in foundry process, device models, packages, and board parasitics.
The DesignWare USB-C/USB 3.0 femtoPHYs build on years of customer success with Synopsys’ silicon-proven USB PHY IP product line, which has been ported to over 100 process nodes and configuration combinations ranging from 180-nm to 14/16-nm FinFET. When combined with the DesignWare digital controllers and verification IP, the DesignWare USB-C/USB 3.0 femtoPHYs deliver a complete, low power and small die area solution for advanced system-on-chip (SoC) designs.
The DesignWare USB-C/USB 3.0 femtoPHYs implement the latest USB Battery Charging and USB On-The-Go (OTG) specifications from the USB Implementer’s Forum (USB-IF).
Architected for the industry’s most advanced 1.8V process technologies, the USB-C/USB 3.0 femtoPHYs are designed to minimize effects due to variations in foundry process, device models, packages, and board parasitics.
The DesignWare USB-C/USB 3.0 femtoPHYs build on years of customer success with Synopsys’ silicon-proven USB PHY IP product line, which has been ported to over 100 process nodes and configuration combinations ranging from 180-nm to 14/16-nm FinFET. When combined with the DesignWare digital controllers and verification IP, the DesignWare USB-C/USB 3.0 femtoPHYs deliver a complete, low power and small die area solution for advanced system-on-chip (SoC) designs.
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