DVB-S2X Narrowband Demodulator and Decoder IP-ip-21484

¥10,000.00
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SKU
ip-21484
Brand :
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供应商 T2M
型号 DVB-S2X NarrowBand Demodulator & Decoder IP (Silicon Proven)
类型 Soft IP
到期日 Silicon proven
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特征 This is single demodulator subsystem compliant DVB-S/S2/S2X satellite standards. t is meant to be integrated in the L2A/L2B SOCs. The single demodulator subsystem is made of several blocks. 1 narrow-band demodulator DVB-S / DVBS2 / DVB-S2X up to 65 Msymb/s. 1 DVB-S FEC (Viterbi, Reed-Solomon, Super FEC) 1 DVB-S2 / DVB-S2X FEC (LDPC + BCH decoder) 1 Transport Stream management 1 DiSEqC (1 Rx, 1Tx) 1 FSK QPSK, 8PSK, 16APSK, 32APSK, 64APSK, CCM, VCM, ACM
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This is NarrowBand demodulator IP is silicon proven and extratced from production chipsets, it performs demodulation according to DVB-S, legacy DirectTV, DVB-S2 and DVB-S2X specifications. The input signal from the tuner is A-to-D converted on 10 bits. The DC offset, amplitude mismatch and quadrature error are corrected and the AGC signal level to the tuner is calculated. The carrier frequency offset is corrected. Then the signal is sub sampled and Nyquist root filtered. The signal amplitude is controlled through the second stage (AGC2) block. The pilots, when present, are used to help phase lock to the symbol stream. The signal is equalized, descrambled, and passed to the FEC. An internal state machine controls the automatic acquisition of a channel with various entry points, including warm start (known symbol frequency, small carrier offset), cold start (known symbol frequency and large carrier frequency offset), and blind search (all parameters unknown).

The DVB S2X NarrowBand IP main demodulation path takes its data from a dual ADC sampling the signals I/Q coming from an external tuner. The ADC is clocked at 135MHz and the data are on 10bits. After demodulation, the data is sent either to a DVB-S Forward Error Correction (FEC) path or a DVB-S2 FEC path.

The DVB-S FEC is based on a Viterbi and Reed-Solomon decoders. A SuperFEC mode is also implemented where a second Viterbi block is added to improve the performances. The DVB-S2 FEC is based on a LDPC+BCH decoder and a packet delineator block needed to extract the physical packets (MPEG or GSE) from the FEC frame. The decoded & corrected data is then sent to a transport stream interface managing standard TS-based transmission to the back-end decoder. In addition to this main demodulation path, peripheral interfaces are integrated, a DiSEqC and an FSK interfaces.They are both protocols to communicate with the LNB antenna on the coaxial cable.

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