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| 供应商 | Arm |
|---|---|
| 型号 | Power Optimized Cortex A9 Processor - TSMC 40 G |
| 类型 | Hard IP |
| 到期日 | In Production |
| 源网址 | View more |
| 特征 | TrustZone® Technology Thumb-2 Technology Jazelle RCT and DBX Technology Optimized Level 1 Caches Optional Level 2 Cache Controller Snoop Control Unit Accelerator Coherence Port Generic Interrupt Controller Optional Cortex-A9 NEON Media Processing Engine (MPE) Optional Cortex-A9 Floating-Point Unit (FPU) |
| 详情页 | View more |
| 附件链接 | View more |
The Cortex-A9 processors are the highest performance ARM processors implementing the full richness of the widely supported ARMv7 architecture. Designed around the most advanced, high efficiency, dynamic length, multi-issue superscalar, out-of-order, speculating 8-stage pipeline, the Cortex-A9 processors deliver unprecedented levels of performance and power efficiency with the functionality required for leading edge products across the broad range of consumer, networking, enterprise and mobile applications. The Cortex-A9 microarchitecture is delivered within either a scalable multicore processor, the Cortex-A9 MPCore™ multicore processor, or as a more traditional processor, the Cortex-A9 single core processor. Supporting the configuration of 16, 32 or 64KB four way associative L1 caches, with up to 8MB of L2 cache through the optional L2 cache controller, the scalable multicore processor and the single processor provide the broadest flexibility and are each suited to specific applications and markets.
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