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| 供应商 | Arm |
|---|---|
| 型号 | ARM10E-based macrocell |
| 类型 | Hard IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | 32/16-bit RISC architecture (ARMv5TE) 32-bit ARM instruction set for maximum performance and flexibility 16-bit Thumb instruction set for increased code density DSP instruction extensions and single cycle MAC Instruction and data caches: ARM1020E = 32K/32K, ARM1022E 16K/16K Individual lockable cache/MMU entries ARM and Thumb instruction sets, including fixed-point DSP extensions 64-bit high-bandwidth internal bus architecture with multiple execution units Advanced energy saving power-down modes to address static leakage currents Dual 64-bit AMBA bus-compliant AHB interfaces |
| 详情页 | View more |
| 附件链接 | View more |
The ARM1020E and ARM1022E macrocells incorporate the advanced ARM10E integer core, instruction and data caches, full-featured memory management unit, and dual high-bandwidth 64-bit AMBA bus-compliant AHB interfaces. The ARM1022E is identical to the ARM1020E macrocell but has 16K/16K caches while the ARM1020E has 32K/32K caches. The macrocells implement the ARMv5TE instruction set and include an enhanced 16 x 32-bit multiplier, capable of single cycle MAC operations. The ARMv5TE instruction set includes 16-bit fixed point DSP instructions to accelerate signal processing algorithms, as well as supporting the Thumb 16-bit instruction set for high code density. Both macrocells deliver 400 MIPS on an advanced 0.13um process and are complemented by the industry's broadest range of compatible application software, development tools, and operating systems. The optional VFP10 floating point unit delivers up to 650 MFLOPS for demanding consumer, automotive and industrial control applications. The ARM1022E core is available via the ARM Foundry Program. ARM has published certified EEMBC benchmarks for ARM1020E
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