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APC SGC21402_S110HULL ADV PMU CTRL FOR DC-DC LDO-ip-16226
￥10,000.00
| 供应商 | SiliconGate |
|---|---|
| 型号 | BANDGAP POR & APC Advanced Power Controller with Power on Reset (Vin=2.3-5.5V) |
| 类型 | Hard IP |
| 到期日 | Pre-silicon |
| 源网址 | View more |
| 特征 | Bandgap POR & CTRL Advanced Power Controller Low IQ: 25 uA Large input voltage range Internal supply voltages generation Level shifter disable signal generation Vref generation with independently decoupled outputs Independent bias current outputs Power-up sequencing controller, External voltage detector and Power-On-Reset |
| 详情页 | View more |
| 附件链接 | View more |
POR Power on Reset: The SGC21412 is an Advanced Power Controller for integration into SoC.
The SGC21412 is based on a common platform that can be scaled for each system needs.
It includes all the necessary auxiliary functions to support the Power Management Unit (PMU).
Additionally it also generates the reset signals based on the monitoring of the regulated voltages.
It offers high power rejection (PSRR), start-up sequencing and independent voltage reference decoupling without the need for extra package pins.
The generated references have digital trimming bits for increased performance or yield improvement.
The SGC21410 is stable without any external decoupling capacitor.
It is specified from TJ = – 40 °C to + 125 °C and is designed to achieve 1 % overall voltage reference accuracy (over Load/Line/Temp/Process)
The SGC21412 is based on a common platform that can be scaled for each system needs.
It includes all the necessary auxiliary functions to support the Power Management Unit (PMU).
Additionally it also generates the reset signals based on the monitoring of the regulated voltages.
It offers high power rejection (PSRR), start-up sequencing and independent voltage reference decoupling without the need for extra package pins.
The generated references have digital trimming bits for increased performance or yield improvement.
The SGC21410 is stable without any external decoupling capacitor.
It is specified from TJ = – 40 °C to + 125 °C and is designed to achieve 1 % overall voltage reference accuracy (over Load/Line/Temp/Process)
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