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| 供应商 | Eureka |
|---|---|
| 型号 | High performance scatter-gather DMA controller supports AHB bus |
| 类型 | Soft IP |
| 到期日 | In Production |
| 源网址 | View more |
| 特征 | Supports multiple DMA channels operates on AHB and I/O buses Each channel can be programmed independently and concurrently Supports multiple DMA sessions with link-list, including scatter-gather with DMA chaining Burst transfer, and buffered and Fly-by DMA deliveries highest performance Hardware and software control DMA start and throttling Interrupt generation at completion of link-list or completion of session Compatible to AHB bus protocol and supports all bus responses Options to support 2-dimensional data transfer for video applications Options to support mis-aligned data transfer Optimized for ASIC and FPGA implementations |
| 详情页 | View more |
| 附件链接 | View more |
The AHB-DMA controller is a general purposed DMA controller optimized for data transfer in many different applications. It supports multiple channels and each channel can be programmed independently and supports four types of transfers, IO-to-memory, memory-to-IO, memory-to-memory, and IO-to-IO transfers. While all memory transfer shares the AHB bus, each channels as dedicated IO bus.
The DMA controller supports the link-list structure to handle multiple DMA sessions including scatter-gather. Software can store a long link-list of multiple DMA transfer settings in memory. The DMA controller process each DMA one at time. At the completion of each DMA, it loads each DMA settings automatically from the link list. Interrupt can be generated at the completion of each session or at the completion of the link-list.
Both buffered and non-buffered (Fly-by) data transfer are supported. In buffered mode, burst data from IO or memory is buffered in the DMA channel before being written to the destination. In non-buffered mode, the burst data is transferred from the source to destination directly.
The DMA controller supports the link-list structure to handle multiple DMA sessions including scatter-gather. Software can store a long link-list of multiple DMA transfer settings in memory. The DMA controller process each DMA one at time. At the completion of each DMA, it loads each DMA settings automatically from the link list. Interrupt can be generated at the completion of each session or at the completion of the link-list.
Both buffered and non-buffered (Fly-by) data transfer are supported. In buffered mode, burst data from IO or memory is buffered in the DMA channel before being written to the destination. In non-buffered mode, the burst data is transferred from the source to destination directly.
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