dwc_usb2_nanophy_ibm-ip-17229

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SKU
ip-17229
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供应商 Synopsys
型号 USB 2.0 nanoPHY in IBM (65nm)
类型 Hard IP
到期日 Available on request
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特征 Designed for advanced manufacturing processes, the USB 2.0 nanoPHY is targeted to leading 65nm and 40nm low-power, low leakage, generic, and high performance CMOS digital logic processes Integrates high-speed mixed-signal, custom CMOS circuitry designed to the UTMI+ Level 3 specification Supports the USB 2.0 480 Mbps protocol and data rate (Hi-Speed) Backward compatible to the USB 1.1 legacy protocol at 1.5 Mbps (Low-Speed) and 12 Mbps (Full-Speed) Can be connected with a Hi-Speed and OTG subsystem to perform as a standard Hi-Speed, Dual-Role Device (DRD), operating as either a fully USB 2.0 Hi-Speed compliant peripheral or an OTG host
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附件名称 dwc_usb2_nanophy.pdf
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The Synopsys DesignWare? USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low power mobile and consumer applications such as next generation handheld game machines, feature rich smart phones, digital cameras and portable audio/video players. The DesignWare USB 2.0 nanoPHY IP delivers approximately half the power and area, compared to other solutions, for longer battery life and lower silicon cost. Designed for high yield, the DesignWare USB 2.0 nanoPHY implements architectural features that make it less sensitive to variations in foundry process, device models, package and board parasitics.

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